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IBM 5160  -  POST and Initialisation


The IBM 5160 went through three revisions of BIOS: 11/08/82, 01/10/86, and 05/09/86.

The following are summaries of the POST (Power On Self Test) and initialisation code within the 11/08/82 and 01/10/86 revisions.
If a 5160 motherboard has the 11/08/82 revision, chip U18 will have "1501512" printed on it.
If a 5160 motherboard has the 01/10/86 revision, chip U18 will have "62X0851" or "62X0852" printed on it.

Reference: The two BIOS source listings in the MAR86 edition of the 5160 Technical Reference


BIOS Revision of 11/08/82

Note: The failure of a test before step 15 results in what appears to be a dead motherboard.

Step
Action
            Comment
Reference
1
 8088 PROCESSOR TEST
 If the test fails, halt the CPU.
 Page 5-116
2
 DISABLE NON MASKABLE INTERRUPTS
 Disable NMIs from reaching the CPU.
 Page 5-116 (line 371)
3
 DMA CHAN 1 PAGE REGISTER
 Zero the page register for DMA channel 1.
 Page 5-116 (line 372)
4
 DISABLE VIDEO
 
 Page 5-116 (lines 373-377)
5
 8255 OPERATION
 8255 PPI chip. Set ports A and B lines to outputs. See note 11.
 Page 5-116 (lines 378-379)
6
 8255 OUTPUTS
 Set the 8255's port A and B lines to various states.
 Page 5-116 (lines 380-386)
7
 ROM CHECKSUM TEST I
 Verify that the checksum of the fourth and final 8 KB block in U18 (i.e. the 8 KB block at FE000) is 00.
 If verification fails, halt the CPU.
 Page 5-116 (lines 385-396)
8
 TEST TIMER 1
 Timer #1 on 8253 interval timer chip. Used in RAM refresh process. If the test fails, halt the CPU.
 Page 5-116
9
 8237 DMA TEST
 Test 8237 DMA controller chip. If the test fails, halt the CPU.
 Page 5-117 (lines 451-472)
10
 START RAM REFRESH
 RAM refresh is done via dummy DMA transfers.
 1. Initialise timer #1 with divisor of 18 - results in one pulse per approx. 15 Ás.
 2. Initialise and start DMA controller.
 Page 5-117 (lines 474-502)
11
 EXPANSION I/O BOX - ENABLE
 Write 1 to port 213h. If an extender card for the IBM 5161 Expansion Unit is present in the 5160, that action enables the extender card to
 communicate with the 5161. Presumably, this enabling is done now so that any RAM in the 5161 is zeroed in step 14.
 See note 7 for more information.
 Page 5-117 (lines 513-515)
12
 BASE 16 KB RAM - TEST
 If a cold boot, test first 16 KB of RAM. If the test fails, loop forever.
 Page 5-117
13
 BASE 16 KB RAM - ZERO
 Zero the contents of the first 16 KB of RAM.
 Page 5-118 (lines 531-533)
14
 DETERMINE TOTAL RAM FITTED /
 ZERO RAM
 Size determined by a write/read to the first two addresses of each successive 16KB block. That is flawed design. See note 9.
 After each block is 'discovered', the RAM in that block is zeroed.
 Only goes as high as A0000 (640 KB).
 Done on both cold and warm boots.
 For cold boots, the act of writing to each RAM address will appropriately set/reset the parity bit of each address. See note 6.
 Page 5-118 (lines 534-555)
15
 8259 INITIALISATION
 Initialise the 8259 interrupt controller chip.
 Page 5-118
16
 INIT/START VIDEO CONTROLLER
 
 1. Initialise monochrome and CGA video cards. On failure, beep 1 long then 2 short.
 
 2. Look for BIOS expansion ROMs in address block C0000 - C7FFF. Those will be video ROMs in EGA/PGA/VGA cards.
     If one found (first 2 bytes are 55/AA), verify that its checksum is 00, and if that verification passes, call the initialisation code in the ROM.
     If verification fails, then display the address of faulty ROM followed by " ROM" (e.g. "C0000 ROM").
     See note 5 for more information.
 
 Page 5-119
17
 8259 TEST
 If the test fails, display a "101" error then halt the CPU.
 Page 5-120
18
 TEST/SET TIMER 0
 Timer #0 on 8253 interval timer chip.
 If the test fails, display a "101" error then halt the CPU.
 Page 5-120
19
 KEYBOARD TEST
 If the test fails, display a "301" error. See note 13 for possible causes.
 Page 5-121
20
 INTERRUPT VECTORS
 Set up interrupt vector table.
 Page 5-121
21
 EXPANSION I/O BOX - TEST
 If an extender card for the IBM 5161 Expansion Unit is fitted in the 5160, then test communications with the 5161.
 If the test fails, display an "1801" error.
 Page 5-122
22
 ADDITIONAL RAM TEST
 Test RAM past 16 KB. Only do on cold boot.
 If the test fails, display failing address followed by bit error pattern, followed by " 201". Example: "30000 80 201".
 Page 5-123
23
 EXPANSION ROM SEARCH
 Look for BIOS expansion ROMs in address range C8000 to F5FFF (see note 2).
 For each one found (first 2 bytes are 55/AA), verify that its checksum is 00.
 If verification passes, call the initialisation code in the ROM.
 If verification fails, then display address of faulty ROM followed by " ROM" (e.g. "C8000 ROM").

 Page 5-124

 See note 1 for more info.
24
 ROM CHECKSUM TEST II
 1. Verify that the checksum of U19 (i.e. 8 KB at F6000) is 00.
 2. Verify that the checksum of the first 8 KB block in U18 (i.e. 8 KB at F8000) is 00.
 3. Verify that the checksum of the second 8 KB block in U18 (i.e. 8 KB at FA000) is 00.
 3. Verify that the checksum of the third 8 KB block in U18 (i.e. 8 KB at FC000) is 00.
 If any verification fails, then display the address of faulty 8 KB block followed by " ROM" (e.g. "F6000 ROM").
 
 See note 4 for more information.
 
 Page 5-124
25
 DISKETTE ATTACHMENT TEST
 Only performed if switch 1 on switch block SW1 is in the OFF position.
 Test communication with floppy controller card. On failure, display a "601" error.
 Via controller, turn floppy drive A: motor on.
 Via controller, move heads of floppy drive A: to track 1. On failure, display a "601" error.
 Via controller, move heads of floppy drive A: to track 34. On failure, display a "601" error. See note 14.
 Via controller, turn floppy drive A: motor off.
 Page 5-124
26
 SET UP KEYBOARD BUFFER
 
 Page 5-124
27
 8259 - ENABLE TIMER/KYB INT
 Enable interrupts from 8253 timer [chan. 0] and keyboard.
 Page 5-124 (lines 1214-1216)
28
 PASS/FAIL INDICATION
 Examine BP to see whether or not an error occured earlier.
 If no error then beep 1 short,
 otherwise beep 2 short then display "ERROR. (RESUME = F1 KEY)" then wait for the F1 key to be pressed.
 Page 5-125 (lines 1217-1238)
29
 LOOP POST
 If switch 1 on switch block SW1 is in the ON position, restart the computer.
 Page 5-93 (lines 1235-1238)
30
 CLEAR SCREEN
 
 Page 5-125 (lines 1239-1241)
31
 DETERMINE LPT (PARALLEL) PORTS
 
 Page 5-125 (lines 1245-1261)
32
 DETERMINE COM (SERIAL) PORTS
 RS232
 Page 5-125 (lines 1262-1286)
33
 GAME CARD
 Is a game card present?
 Page 5-125 (lines 1287-1294)
34
 ENABLE NON MASKABLE INTERRUPTS
 
 Page 5-125 (line 1304-1305)
35
 DO BOOTSTRAP
 Attempt to boot from A: drive, else try C: (if present), else run resident BASIC.
 Page 5-125 (line 1307)



BIOS Revision of 01/10/86

Note: The failure of a test before step 16 results in what appears to be a dead motherboard.

Step
Action
            Comment
Reference
1
 8088 PROCESSOR TEST
 If the test fails, halt the CPU.
 Page 5-85
2
 DISABLE NON MASKABLE INTERRUPTS
 Disable NMIs from reaching the CPU.
 Page 5-85 (line 202)
3
 DMA CHAN 1 PAGE REGISTER
 Zero the page register for DMA channel 1.
 Page 5-85 (line 203)
4
 DISABLE VIDEO
 
 Page 5-85 (lines 204-208)
5
 8255 OPERATION
 8255 PPI chip. Set ports A and B lines to outputs. See note 11.
 Page 5-85 (lines 209-210)
6
 8255 OUTPUTS
 Set the 8255's port A and B lines to various states.
 Page 5-85 (lines 211-217)
7
 ROM CHECKSUM
 Verify that the combined checksum of U18 and U19 (i.e. 64KB block at F0000) is 00.
 If verification fails, halt the CPU.
 Page 5-85
8
 TEST TIMER 1
 Timer #1 on 8253 interval timer chip. Used in RAM refresh process. If the test fails, halt the CPU.
 Page 5-86 (lines 246-274)
9
 8237 DMA TEST
 Test 8237 DMA controller chip. If the test fails, halt the CPU.
 Page 5-86 (lines 280-307)
10
 START RAM REFRESH
 RAM refresh is done via dummy DMA transfers.
 1. Initialise timer #1 with divisor of 18 - results in one pulse per approx. 15 Ás.
 2. Initialise and start DMA controller.
 Page 5-87 (lines 309-337)
11
 DELAY
 A delay to better cater for dynamic RAM chips. See note 12.
 Page 5-87 (lines 347-350)
12
 BASE 64 KB RAM - TEST
 If a cold boot, test first 64 KB of RAM. If the test fails, loop forever.
 Page 5-87 (lines 356-368)
13
 BASE 64 KB RAM - ZERO
 Zero the contents of the first 64 KB of RAM.
 Page 5-87 (lines 369-371)
14
 DETERMINE TOTAL RAM FITTED /
 ZERO RAM
 Size determined by a write/read to the first two addresses of each successive 16 KB block. That is flawed design. See note 9.
 After each block is 'discovered', the RAM in that block is zeroed.
 Only goes as high as A0000 (640KB).
 Done on both cold and warm boots.
 For cold boots, the act of writing to each RAM address will appropriately set/reset the parity bit of each address. See note 6.
 Page 5-87 (lines 372-399)
15
 8259 INITIALISATION
 Initialise the 8259 interrupt controller chip.
 Page 5-87
16
 INIT/START VIDEO CONTROLLER
 
 1. Initialise monochrome and CGA video cards. On failure, beep 1 long then 2 short.
 
 2. Look for BIOS expansion ROMs in address block C0000 - C7FFF. Those will be video ROMs in EGA/PGA/VGA cards.
     If one found, verify that its checksum is 00, and if that verification passes, call the initialisation code in the ROM.
     If verification fails, then display address of faulty ROM followed by " ROM" (e.g. "C0000 ROM").
     See note 5 for more information.
 
 Page 5-88
17
 8259 TEST
 If the test fails, display a "101" error then halt the CPU.
 Page 5-89
18
 TEST/SET TIMER 0
 Timer #0 on 8253 interval timer chip.
 If the test fails, display a "101" error then halt the CPU.
 Page 5-90
19
 KEYBOARD TEST
 If the test fails, display a "301" error. See note 13 for possible causes.
 Page 5-90
20
 INTERRUPT VECTORS
 Set up interrupt vector table.
 Page 5-90
21
 EXPANSION I/O BOX - TEST
 If an extender card for the IBM 5161 Expansion Unit is fitted in the 5160, then test communications with the 5161.
 If the test fails, display an "1801" error.
 Page 5-91
22
 ADDITIONAL RAM TEST
 Test RAM past 64 KB. Only do on cold boot.
 If the test fails, display failing address followed by bit error pattern, followed by " 201". Example: "30000 80 201".
 See note 10 for more info.
 Page 5-91
23
 EXPANSION ROM SEARCH
 Look for BIOS expansion ROMs in address block C8000 to EFFFF (see note 3).
 For each one found, verify that its checksum is 00.
 If verification passes, call the initialisation code in the ROM.
 If verification fails, then display address of faulty ROM followed by " ROM" (e.g. "C8000 ROM").
 
 Page 5-92

 See note 8 for more info.
24
 DISKETTE ATTACHMENT TEST
 Only performed if switch 1 on switch block SW1 is in the OFF position.
 Test communication with floppy controller card. On failure, display a "601" error.
 Via controller, turn floppy drive A: motor on.
 Via controller, move heads of floppy drive A: to track 1. On failure, display a "601" error.
 Via controller, move heads of floppy drive A: to track 34. On failure, display a "601" error. See note 14.
 Via controller, turn floppy drive A: motor off.
 Page 5-92
25
 SET UP KEYBOARD BUFFER
 
 Page 5-93
26
 8259 - ENABLE TIMER/KYB INT
 Enable interrupts from 8253 timer [chan. 0] and keyboard.
 Page 5-93
27
 PASS/FAIL INDICATION
 Examine BP to see whether or not an error occured earlier.
 If no error then beep 1 short,
 otherwise beep 2 short then display "ERROR. (RESUME = F1 KEY)" then wait for the F1 key to be pressed.
 Page 5-93
28
 LOOP POST
 If switch 1 on switch block SW1 is in the ON position, restart the computer.
 Page 5-93 (lines 1094-1097)
29
 CLEAR SCREEN
 
 Page 5-93 (lines 1098-1100)
30
 DETERMINE LPT (PARALLEL) PORTS
 
 Page 5-93 (lines 1104-1120)
31
 DETERMINE COM (SERIAL) PORTS
 RS232
 Page 5-93 (lines 1121-1136)
32
 GAME CARD
 Is a game card present?
 Page 5-94 (lines 1146-1153)
33
 ENABLE NON MASKABLE INTERRUPTS
 
 Page 5-94 (lines 1163-1164)
34
 DO BOOTSTRAP
 Attempt to boot from A: drive, else try C: (if present), else run resident BASIC.
 Page 5-94 (line 1166)




Note 1  Page 5-124: ROM_SCAN - The code that does the search.
 Page 5-169: ROM_CHECK - The code called to see if a particular ROM has an expected checksum of 00.
 Page 5-126: ROM_ERR - The code called if a ROM's checksum is bad (not 00).
   
Note 2  Start signature of ROM checked for in 2K increments: C8000, C8800, C9000, --> F5800
 The last address checked is F5800, which makes sense because the 11/08/82 BIOS starts at F6000.
 Block end address incorrectly commented as "F4000" in source code. It should be "F6000".
   
Note 3  Start signature of ROM checked for in 2 KB increments: C8000, C8800, C9000, --> EF800
 The last address checked is EF800, which makes sense because the 01/10/86 BIOS starts at F0000.
   
Note 4  * In the reference, this is the routine labelled BASE_ROM_CHK (page 5-124).
 * On this motherboard (64/256), U18 is 32 KB sized and U19 is 8 KB sized.
 * No need to check fourth 8 KB block in U18 - was already done by step 7.
   
Note 5  The initialisation code in some video ROMS produce their own error beeps.
 Example: IBM EGA cards produce 1 long beep followed by 3 short beeps.
   
Note 6  On power on of the computer, the contents of motherboard RAM will be somewhat random.
 That means that for a certain portion of addresses, the content of the parity bit will not reflect the parity of the combined data bits.
 After POST completion (non maskable interrupts enabled), attempts to read from such addresses would result in a parity error.
 By writing (anything) to the addresses now, the parity bit at the address is appropriately set/reset.
   
Note 7  This step may not actually be required because in the IBM documentation on the IBM 5161 is, "The expansion unit is automatically enabled upon power-up."
 It is reinforced by the fact that this step was not included in the 01/10/86 revision of the 5160 BIOS.
   
Note 8  Page 5-92: ROM_SCAN - The code that does the search.
 Page 5-101: ROM_CHECK - The code called to see if a particular ROM has an expected checksum of 00.
 Page 5-95: ROM_ERR - The code called if a ROM's checksum is bad (not 00).
   
Note 9  The size determination process is flawed in design.
 Why? Because if the process encounters faulty RAM, the process incorrectly assumes that it has reached the end of RAM.
   
Note 10  People have observed that this BIOS tests RAM faster than the earlier BIOS.
 The technical reason for the faster testing is that the earlier BIOS (11/08/82) writes/reads a byte at a time, whereas this BIOS (01/10/86) writes/reads a word at a time.
 11/08/82: Use of STOSB and LODSB in STGTST_CNT routine (page 5-126 of reference)
 01/10/86: Use of STOSW and LODSW in STGTST_CNT routine (page 5-97 of reference)
   
Note 11  1. At power on (and after RESET released), the 8255 defaults to mode 0 operation for both groups, with all 3 ports (A, B and C) being inputs.
    So, even though the command sent to the 8255 is [Group_A_mode=0, Group_B_mode=0, Port_A=outputs, Port_B=outputs, Port_C_upper=inputs, Port_C_lower=inputs], the only result is that the port A and B lines change from inputs to outputs.
 
 2. This is a different arrangement to the IBM 5150. In the IBM 5150, port A lines are inputs.
   
Note 12  The following text from the Panasonic MN4164 datasheet is typical of dynamic RAM:
 Several cycles are required after power up or prolonged periods of RAS inactivity before proper device operation is acheived.
 Any 8 cycles which perform refresh are adequate for this purpose.
   
Note 13  Some (not all) known causes:
 1. AT class keyboard attached. That will not work. A PC/XT class keyboard is required.
 2. No keyboard attached.
 3. Faulty keyboard.
   
Note 14 The only form of head position feedback that the floppy drive electronics has, is a switch that detects whether or not the heads are at the first track. And so the drive really doesn't know if the heads got as far as track 34. For example, deteriorated lubrication on the drive's rails (resulting in intermittent head stepping) may mean that the heads only got as far as say, track 22. In that example, the drive is faulty (intermittent head stepping), but the 601 test is passing because the drive is unable to detect exact head position (except for the heads being on the first track).